Видео 32
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13 years of top 500 supercomputer development

0:23

X-ray of an LGA pacakge with two dies stacked side-by-side on an organic interposer

0:25

Organic interposer by 3D X-ray layer by layer

0:24

Cross-sectional SEM of a 2.5D package for the examination of bump connections

15 years of top 500 supercomputer development

Plots of performance (in teraflops) versus power consumption (in kilowatt) of top-500 supercomputers from 2008 to 2022, which update biyearly, show the improving trend of energy efficiency (in gigaflops per watt), with the most powerful supercomputer at that time labeled. 2008 marked the year for the supercomputer to reach 1,000 teraflops (1 petaflop) and 2022 the year to reach 1,000,000 teraflops (1 exaflop), while the power efficiency improved from smaller than 0.5 gigaflop per watt to larger than 50 gigaflops per watt.

Видео

13 years of top 500 supercomputer development

0:23

13 years of top 500 supercomputer development

Просмотров 843 года назад

Plots of performance (in teraflops) versus power consumption (in kilowatt) of top-500 supercomputers from 2008 to 2020, updated biyearly, showing the improving trend of energy efficiency (in gigaflops per watt), with the most powerful supercomputer at that time labeled

X-ray of an LGA pacakge with two dies stacked side-by-side on an organic interposer

0:25

X-ray of an LGA pacakge with two dies stacked side-by-side on an organic interposer

Просмотров 1776 лет назад

The X-ray photos have been pseudo colored from the gray level. They were taken layer by layer from bottom to top (i.e., from LGA lands to dies), each step moving up 46 um. The die on the left is a DRAM and that on the right a logic. There are about 1000 wires connected between them and these wires go through the underlying organic interposer.

Organic interposer by 3D X-ray layer by layer

0:24

Organic interposer by 3D X-ray layer by layer

Просмотров 2366 лет назад

DRAM (37nm) and logic (40nm) dies stacked side-by-side on an organic interposer and then mounted on an LGA package substrate. The X-ray scans from the underlying LGA package substrate to the organic interposer and the dies above.

Cross-sectional SEM of a 2.5D package for the examination of bump connections

0:25

Cross-sectional SEM of a 2.5D package for the examination of bump connections

Просмотров 2926 лет назад

Two cross sectional cuts have been performed on the package: one close to the die edge and the other in the middle. The video shows the edge cut first and then the middle cut. The die on the left is a DRAM and that of the right a logic. Each cut shows about 135 bumps between the dies (including both DRAM and logic) and the organic interposer and 35 bumps between the organic interposer and the p...

3:57

DArT demo

Просмотров 476 лет назад

DArT is a DRAM area, power, and timing modeling tool. It provides high flexibility and accuracy for DRAM architecture exploration by using a component-based modeling scheme which allows the user to configure the DRAM device and interface parameters linking to full-system simulation.

3:48

PNSyn demo video

Просмотров 326 лет назад

PNSyn is a power delivery network synthesizer for 2-D, 2.5-D, and 3-D ICs developed by Information and Communications Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan.

1:11

DRAM TSVs

Просмотров 676 лет назад

DRAM TSVs

Performance comparison between HBLL and DDR4 DRAM with Stream-triad benchmark on ZSim

0:45

Performance comparison between HBLL and DDR4 DRAM with Stream-triad benchmark on ZSim

Просмотров 916 лет назад

The system consists of a 4-core Intel CPU running at 4 GHz with 2 GB main memory with HBLL-2000 or with DDR4-3200. HBLL is a customized DRAM placed side by side with the CPU. The video displays the real-time bandwidth and average bandwidth in GB/s, and clearly shows the bandwidth benefit using the HBLL with the Stream benchmark of triad.

BRAW: Ball/Bump Reassignment Aware of Warpage

1:08

BRAW: Ball/Bump Reassignment Aware of Warpage

Просмотров 166 лет назад

BRAW stands for Ball/Bump Reassignment Aware of Warpage. It is a simple tool that we developed for ball/bump assignment which takes substrate or interposer warpage into account. The tool is based on Excel spreadsheet and has an interface very intuitive to use.

0:37

Logic TSVs

Просмотров 466 лет назад

Logic TSVs

0:06

Micro bump open due to die warpage

Просмотров 83210 лет назад

The video clip shows micro bump open failures in the middle of a 22 by 172 array due to warpage in the stacked die.

1:08

Illustration of a Wire Bonding Process

Просмотров 96 тыс.10 лет назад

The cartoon shows a wire bonding process from a bond pad on a chip to a lead of a package. The process is known as ball bonding. Many terms related to the process, such as loop height an wire length, are illustrated.

3:43

ThermalMeter demo video

Просмотров 2610 лет назад

ThermalMeter demo video

3:55

DArT Intel Innovation Day Taiwan Demo

Просмотров 1910 лет назад

A video clip shows the features of DRAM area, power, and timing estimation tool, developed by Information and Communications Research Laboratories (ICL), Industrial Technology Research Institute (ITRI). It was played in the Intel Innovation Day held in Taipei, Taiwan, December 10, 2013. The video lasts about four minutes.